DI: 4-Ch, LVCMOS 1.8/2.5/3.3V DO: 4-Ch, LVCMOS 1.8/2.5/3.3V Note: LVCMOS Level is user configurable.
12
OG-DGIO-LVCMOS
FSIM-50-Y33
Option-1: 28V Open-ground Input, 8-Ch Option-2: 28V Open-ground Output, 8-Ch Option-3: 28V Open-ground, Input: 4, Output: 4. Note: 1. External signal is optically isolated from secondary supply. 2. Open state voltage (3.3-30V) is supplied externally.
Dual channel 10BASE-T1s Ethernet Port System: point-to-point, Bus Data transmission: Full-duplex/Half-duplex Data rate: 10Mbps No. of Nodes: 8-40 (Bus) Length: up to 25m (Bus)
The following FSIM-50 series boards are specifically designed for EAGLE V2 Board to configure for HMI and GEM interfaces. These modules can be populated only in respective SMP slots of EAGLE V2 board.
Sl
Module
Part code
Specification
15
JTAG Bridge
FSIM-50-705
This board is used as USB based JTAG connector with additional UART debug port. USB to JTAG PS UART – 1 Nos (Through JTAG USB) PL UART – 2 Nos (Through JTAG USB) LED – 4 Nos
16
JTAG PORT
FSIM-50-706
One of the most basic SMP boards with the following features: JTAG signal terminated at JTAG port 4 Nos of LED through resistor (1.8V) 4 Nos of DIP switches (in 1.8V pull-up) PS UART USB module port.
17
DP-SD
FSIM-50-750
DP Port: Mini DP Port FPGA line: 4(MIO), 1(PS-GTR) for DP FPGA line: 8 for SD 2.0
18
USB
FSIM-50-760
USB: Dual USB 2.0 ports FPGA line: 13 (MIO), 1(PS-GTR)
19
GT-GEM
FSIM-50-770
Interface: PS GT Lane GT Lane – 1 No FPGA line: 4 (MIO) Speed: 10/100/1000 Mbps Port termination: RJ45
20
MIO-GEM
FSIM-50-780
Interface: MIO Gem Signal Speed: 10/100/1000 Mbps Port termination: RJ45
21
SSD
FSIM-50-810
Interface: PS GT Lane GT Lane – 1 No FPGA line: 8 (PL) Port Line: 8